A high-speed digitising device based on a bank of analogue comparators. The analogue value to be digitised is the input to one side of the comparators bank. The other comparators input is tied to a tap of a resistor ladder, with each comparator tied to its own tap. The input voltage at each comparator will be somewhere between the top and bottom voltages of the resistor ladder. The comparators output a high or a low based on the comparison of the input voltage to the resistor ladder voltage. This string of 1s and 0s are converted to the binary number.