In 1988 a consortium of nine companies developed 32-bit EISA which was compatible with AT architecture. The basic design of EISA is the result of a compilation of the best designs of the whole computer industry rather than (in the case of the ISA bus) a single company. In addition to adding 16 new data lines to the AT bus, bus mastering, automated setup, interrupt sharing, and advanced transfer modes were adapted making EISA a powerful and useful expansion design. The 32-bit EISA can reach a peak transfer rate of 33 MHz, over 50% faster than the Micro Channel architecture. The EISA consortium is presently developing EISA-2, a 132 MHz standard.